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c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . 4 a , 5 v , 5 0 0 k h z s y n c h r o n o u s b u c k c o n v e r t e r f e a t u r e s g e n e r a l d e s c r i p t i o n high efficiency up to 94% - automatic skip/pwm mode operation adjustable output voltage from 0.8v to v in operating from 2.9 to 6v supply integrated 85m w high side / 75m w low side mosfets low dropout operation: 100% duty cycle stable with low esr ceramic capacitors current up to 4a power-on-reset detection on vcc and vin integrate soft-start and soft-stop over-temperature protection over-voltage protection under-voltage protection high/ low side current limit power good indication enable/shutdown function available in sop-8p and tdfn3x3-10 packages lead free and green devices available (rohs compliant) a p p l i c a t i o n s notebook computer & umpc lcd monitor/tv set-top box dsl, switch hubr portable instrument apw7324 is a synchronous buck converters with inte- grated 85m w high side and 75m w low side power mosfets. the apw7324 with a current-mode control scheme can convert wide input voltage of 2.9v to 6v to the output voltage adjustable from 0.8v to 6v to provide excellent output voltage regulation. the apw7324 is equipped with an automatic skip/pwm mode operation. at light load , the ic operates in the skip mode to reduce the switching losses. at heavy load, the ic works in pwm mode. the apw7324 is also equipped with power-on-reset, soft start, soft-stop, and whole protections (under-voltage, over-voltage, over-temperature and current-limit) into a single package. this device, available in sop-8p and tdfn3x3-10 packages, provides a very compact system solution ex- ternal components and pcb area. s i m p l i f i e d a p p l i c a t i o n c i r c u i t p i n c o n f i g u r a t i o n v out c3 r2 vin vcc en gnd pgnd fb lx c2 r3 apw7324 v in r1 c1 (optional) l1 c4 off on pok vcc 1 pok 2 gnd 3 fb 4 5 en 6 pgnd 7 lx 8 vin sop - 8 p ( top view ) pgnd 3 10 fb en 1 nc 2 lx 5 9 gnd 7 vcc 8 pok lx 4 6 vin tdfn 3 x 3 - 10 ( top view ) exposed pad ( connected to gnd plane for better heat dissipation
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 2 o r d e r i n g a n d m a r k i n g i n f o r m a t i o n n o t e : a n p e c l e a d - f r e e p r o d u c t s c o n t a i n m o l d i n g c o m p o u n d s / d i e a t t a c h m a t e r i a l s a n d 1 0 0 % m a t t e t i n p l a t e t e r m i n a t i o n f i n i s h ; w h i c h a r e f u l l y c o m p l i a n t w i t h r o h s . a n p e c l e a d - f r e e p r o d u c t s m e e t o r e x c e e d t h e l e a d - f r e e r e q u i r e m e n t s o f i p c / j e d e c j - s t d - 0 2 0 d f o r m s l c l a s s i f i c a t i o n a t l e a d - f r e e p e a k r e f l o w t e m p e r a t u r e . a n p e c d e f i n e s ? g r e e n ? t o m e a n l e a d - f r e e ( r o h s c o m p l i a n t ) a n d h a l o g e n f r e e ( b r o r c l d o e s n o t e x c e e d 9 0 0 p p m b y w e i g h t i n h o m o g e n e o u s m a t e r i a l a n d t o t a l o f b r a n d c l d o e s n o t e x c e e d 1 5 0 0 p p m b y w e i g h t ) . a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 ) symbol parameter rating unit v in , v cc vin and vcc input voltage - 0.3 ~ 7 v v lx lx to gnd voltage - 1 ~v cc +0.3 v fb, en, pok to gnd voltage - 0.3 ~ 6.5 v p d power dissipation internally limited w t j junction temperature 150 o c t stg storage temperature - 65 ~ 150 o c t sdr maximum lead soldering temperature ( 10 seconds ) 26 0 o c n o t e 1 : s t r e s s e s b e y o n d t h o s e l i s t e d u n d e r " a b s o l u t e m a x i m u m r a t i n g s " m a y c a u s e p e r m a n e n t d a m a g e t o t h e d e v i c e . t h e s e a r e s t r e s s r a t i n g s o n l y a n d f u n c t i o n a l o p e r a t i o n o f t h e d e v i c e a t t h e s e o r a n y o t h e r c o n d i t i o n s b e y o n d t h o s e i n d i c a t e d u n d e r " r e c o m - m e n d e d o p e r a t i n g c o n d i t i o n s " i s n o t i m p l i e d . e x p o s u r e t o a b s o l u t e m a x i m u m r a t i n g c o n d i t i o n s f o r e x t e n d e d p e r i o d s m a y a f f e c t d e v i c e r e l i a b i l i t y t h e r m a l c h a r a c t e r i s t i c s symbol parameter typical value unit q ja junction - to - ambient resistance in free air (note 2 ) 50 o c/w q jc junction - to - case resistance in free air (note 3) 10 o c/w note 2: q ja is measured with the component mounted on a high effective thermal conductivity test board in free air. the exposed pad of sop-8p is soldered directly on the pcb. note 3: the case temperature is measured at the center of the exposed pad on the underside of the sop-8p package. apw 7324 handling code temperature range package code assembly material package code ka : sop - 8 p qb : tdfn 3 x 3 - 10 operating ambient temperature range i : - 40 to 85 o c handling code tr : tape & reel assembly material g : halogen and lead free device apw 7324 ka : xxxxx - date code apw 7324 xxxxx apw 7324 qb : xxxxx - date code apw 7324 xxxxx
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 3 symbol parameter range unit v cc vcc supply voltage 2.9 ~ 6 v v in vin supply voltage 2.5~6 v v out converter output voltage 0.8~6 v i out converter maximum output current 4 a t a ambient temperature - 40 ~ 85 o c t j junction temperature - 40 ~ 125 o c r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s ( n o t e 4 ) e l e c t r i c a l c h a r a c t e r i s t i c s unless otherwise specified, these specifications apply over v cc =v in =5v, v out =3.3v and t a =-40~85 o c. typical values are at t a =25 o c. n o t e 4 : r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t . apw7324 symbo l parameter test conditions min. typ. max. unit supply current i v cc vcc supply current v fb =0.7v - 460 - m a i vcc_sd vcc shutdown supply current en=gnd - - 20 m a power - on - r eset (por) vcc por voltage threshold v cc rising - 2.7 - v vc c por voltage hysteresis v cc falling - 200 - mv vcc debounce time - 10 - m s vin por voltage threshold v in rising - 2.3 - v vin por voltage hysteresis v in falling - 50 - mv reference voltage - 0.8 - v v ref reference voltage all temperature - 1 - +1 % output accuracy i out =10ma ~3a, v cc = 2.9~5 v - 1.5 - +1.5 % oscillator and duty cycle f osc oscillator frequency 425 500 575 khz maximum converter ? s duty v fb =0.7v - 100 - % minimum on time - 70 - ns power mosfet high side mosfet resistance v c c = v in =5v, i lx =0.5a, t a =25 o c - 85 115 m w low side mosfet resistance v cc = v in =5v, i lx =0.5a, t a =25 o c - 75 105 m w
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 4 e l e c t r i c a l c h a r a c t e r i s t i c s ( c o n t . ) unless otherwise specified, these specifications apply over v cc =v in =5v, v out =3.3v and t a =-40~85 o c. typical values are at t a =25 o c. apw7324 symbo parameter test conditions min. typ. max. unit current - mode pwm converter gm error amplifier transconductance - 680 - m a/v error amplifier dc gain comp=nc - 50 - db current sense resistance - 400 - m w t d dead time - 20 - ns p roteceions i lim high side mosfet current - limit peak current 5 6 7 a t otp over - temperature trip point - 160 - c over - temperature hysteresis - 50 - c over - voltage protection t hreshold 120 125 130 %v ref ovp debounce time - 3 - m s under - volt age protection threshold 45 50 55 %v ref uvp debounce time - 3 - m s low side switch current - limit from drain to source - 1.6 - 1.9 - 2.2 a soft - start, enable and input currents soft start time - 2.5 - ms en enable threshold voltage v en rising 0.8 - 1.3 v en threshold hysteresis - 0.15 - v en pull high resistance - 300 - k w power good pok in from lower (pok goes high) 85 87.5 90 %v out pok low hysteresis - 5 - %v out pok in from higher (pok goes high) 110 112.5 115 %v out pok threshold pok high hysteresis - 5 - %v out pok pull low resistance - 1 - kw pok low - to - high debounce time - 0.5 - ms
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 5 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s efficiency vs . output current e f f i c i e n c y ( % ) 0 . 001 0 . 01 0 . 1 1 10 output current , i out ( a ) 60 80 85 90 95 100 v in = 5 v v out = 1 . 2 v v out = 3 . 3 v 65 70 75 vcc supply current vs . vcc supply voltage vcc supply voltage ( v ) v c c s u p p l y c u r r e n t , i v c c ( m a ) 2 . 5 3 0 100 200 300 400 500 600 3 . 5 4 4 . 5 5 5 . 5 6 v cc = 5 v , v in = 5 v , v out = 3 . 3 v , no load , t a = 25 o c high side mosfet current limit threshold vs . vin voltage h i g h s i d e m o s f e t c u r r e n t l i m i t t h r e s h o l d , i l i m ( a ) 2 . 5 3 4 . 5 5 5 . 5 vin voltage , v vin ( v ) 0 . 0 0 . 5 1 . 0 1 . 5 2 . 0 2 . 5 3 . 0 3 . 5 4 . 0 4 . 5 3 . 5 4 6 on - resistance vs . vin voltage vin voltage , v vin ( v ) 2 . 5 3 3 . 5 4 4 . 5 5 5 . 5 o n - r e s i s t a n c e , r d s ( o n ) ( m w ) 6 t a = 25 o c p - mosfet n - mosfet 70 75 80 85 90 95 100 105 110 115 120 reference voltage vs . output current r e f e r e n c e v o l t a g e , v r e f ( v ) 0 0 . 5 2 3 4 output current , i out ( a ) 0 . 75 0 . 76 0 . 77 0 . 78 0 . 79 0 . 80 0 . 81 0 . 82 0 . 83 0 . 84 0 . 85 1 1 . 5 3 . 5 2 . 5
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 6 o p e r a t i n g w a v e f o r m s t h e t e s t c o n d i t i o n i s a p w 7 3 2 4 , v i n = v c c = 5 v , v o u t = 1 . 8 v , c o u t = 2 2 m f x 2 , l = 2 . 2 m h , t a = 2 5 o c u n l e s s o t h e r w i s e s p e c i f i e d . e n a b l e w i t h o u t l o a d i n g s h u t d o w n w i t h o u t l o a d i n g e n a b l e w i t h 2 a l o a d i n g s h u t d o w n w i t h 2 a l o a d i n g time : 1 m s / div ch 2 : v out , 1 v / div , dc ch 1 : v en , 5 v / div , dc ch 3 : v pok , 5 v / div , dc ch 4 : i l , 2 a / div , dc no load , en power on 1 v out i l v en v pok 2 3 4 time : 100 m s / div no load , en power off ch 2 : v out , 1 v / div , dc ch 1 : v en , 5 v / div , dc ch 3 : v pok , 5 v / div , dc ch 4 : i l , 2 a / div , dc 1 v out i l v en v pok 2 3 4 time : 1 m s / div ch 2 : v out , 1 v / div , dc ch 1 : v en , 5 v / div , dc ch 3 : v pok , 5 v / div , dc ch 4 : i l , 2 a / div , dc i out = 2 a , en power on 1 v out i l v en v pok 2 3 4 time : 100 m s / div ch 2 : v out , 1 v / div , dc ch 1 : v en , 5 v / div , dc ch 3 : v pok , 5 v / div , dc ch 4 : i l , 2 a / div , dc i out = 2 a , en power off 1 v out i l v en v pok 2 3 4
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 7 o p e r a t i n g w a v e f o r m s t h e t e s t c o n d i t i o n i s a p w 7 3 2 4 , v i n = v c c = 5 v , v o u t = 1 . 8 v , c o u t = 2 2 m f x 2 , l = 2 . 2 m h , t a = 2 5 o c u n l e s s o t h e r w i s e s p e c i f i e d . l o a d t r a n s i e n t l o a d t r a n s i e n t c u r r e n t l i m i t o v e r v o l t a g e p r o t e c t i o n time : 50 m s / div ch 2 : i out , 2 a / div , dc ch 1 : v out , 200 mv / div , offset = 1 . 8 v i out = 100 ma - 4 a - 100 ma , slew rate = 1 a / m s 1 v out i out 2 time : 50 m s / div ch 2 : i out , 2 a / div , dc ch 1 : v out , 200 mv / div , offset = 1 . 8 v i out = 1 a - 4 a - 1 a , slew rate = 1 a / m s 1 v out i out 2 time : 200 m s / div ch 2 : v pok , 5 v / div , dc ch 1 : v out , 1 v / div , dc ch 3 : i out , 5 a / div , dc 1 v out i out v pok 2 3 time : 50 m s / div ch 2 : v pok , 5 v / div , dc ch 1 : v out , 1 v / div , dc ch 3 : i l , 2 a / div , dc no load , a 2 . 5 v power source is externally attached to v out 1 v out i l v pok 2 3
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 8 o p e r a t i n g w a v e f o r m s t h e t e s t c o n d i t i o n i s a p w 7 3 2 4 , v i n = v c c = 5 v , v o u t = 1 . 8 v , c o u t = 2 2 m f x 2 , l = 2 . 2 m h , t a = 2 5 o c u n l e s s o t h e r w i s e s p e c i f i e d . n o r m a l o p e r a t i o n i n l i g h l o a d n o r m a l o p e r a t i o n i n h e a v y l o a d time : 2 m s / div ch 2 : v lx , 5 v / div , dc ch 1 : v out , 50 mv / div , offset = 1 . 8 v i out = 200 ma ch 3 : i lx , 2 a / div , dc 1 v out i l 2 v lx 3 time : 2 m s / div ch 2 : v lx , 5 v / div , dc ch 1 : v out , 50 mv / div , offset = 1 . 8 v i out = 4 a ch 3 : i lx , 5 a / div , dc 1 v out i l 2 v lx 3
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 9 p i n d e s c r i p t i o n pin no. name function sop - 8p tdfn3x3 - 10 1 7 vcc signal input. vcc supplies the control circuitry, gate drivers. connecting a ceramic bypass capacitor from vcc to gnd to eliminate switching noise and voltage ripple on the input to the ic. 2 8 pok p ower good output. this pin is open - drain logic output that is pulled to ground when the output voltage is not within ? 12.5% of regulation point. the pok pin, if used, needs an external pull high resistor in the range of 30k w ~100k w 3 9 gnd ground. power and signal ground. 4 10 fb output feedback input. the apw7324 senses the feedback voltage via fb and regulates the voltage at 0.8v. connecting fb with a resistor - divider from the converter ? s output sets the output voltage. 5 1 en e nable input. en is a digital input that turns the regulator on or off. driving the en high turn s on the regulator, otherwise, driv ing it low turn s it off. the en pin is internally pulled high via a 300k [ resistor. 6 3 pgnd power ground. 7 4, 5 lx power switching output. lx is the junction of the high - side and low - side power mosfets to supply power to the output lc filter. 8 6 vin power input. vin supplies the step - down converter switches. 9 11 exposed pad exposed pad. connect the exposed pad to the system ground plane with large copper area for dissipating heat into the ambient air.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 0 b l o c k d i a g r a m lx gate control fault logics error amplifie r fb inhibit por power - on - reset current sense amplifier oscillator slope compensation current comparator over temperature protection current limit gat e gm vin otp current sense amplifier loc loc vcc en 50 % v ref soft start shutdown gnd gate driver uvp v ref ovp 0 . 8 v zero crossing comparator 125 % v re f vin 300 k w 112 . 5 % v ref 87 . 5 % v re f pok
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 1 t y p i c a l a p p l i c a t i o n c i r c u i t apw 7324 vin vcc lx fb v in 5 v v out 1 . 8 v c out 22 fx 2 r 1 25 k w r 2 20 k w c in 22 m f l 1 2 . 2 c 2 1 m f c 1 22 pf gnd r 4 2 . 2 w en r 5 c 3 off on pgnd pok 100 k w exposed pad m h m
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 2 f u n c t i o n d e s c r i p t i o n v c c a n d v i n p o w e r - o n - r e s e t ( p o r ) t t h e a p w 7 3 2 4 k e e p s m o n i t o r i n g t h e v o l t a g e o n v i n a n d v c c p i n s t o p r e v e n t w r o n g l o g i c o p e r a t i o n s w h i c h m a y o c c u r w h e n v i n o r v c c v o l t a g e i s n o t h i g h e n o u g h f o r i n t e r n a l c o n t r o l c i r c u i t r y t o o p e r a t e . t h e v c c p o r r i s i n g t h r e s h o l d i s 2 . 7 v ( t y p i c a l ) w i t h 0 . 2 v h y s t e r e s i s a n d v i n p o r r i s i n g t h r e s h o l d i s 2 . 3 v w i t h 0 . 0 5 v h y s t e r e s i s . d u r i n g s t a r t u p , t h e v c c a n d v i n v o l t a g e m u s t e x c e e d t h e p o r t h r e s h o l d . t h e n t h e i c s t a r t s a s t a r t s - u p p r o c e s s a n d r a m p s u p t h e o u t p u t v o l t a g e t o t h e v o l t a g e t a r g e t . o u t p u t u n d e r - v o l t a g e p r o t e c t i o n ( u v p ) in the operational process, if a short-circuit occurs, the output voltage will drop quickly. before the current-limit circuit responds, the output voltage will fall out of the re- quired regulation range. the under-voltage continually monitors the fb voltage after soft-start is completed. if a load step is strong enough to pull the output voltage lower than the under-voltage threshold, the ic shuts down converter?s output. the under-voltage threshold is 50% of the nominal out- put voltage. the under-voltage comparator has a built-in 3 m s noise filter to prevent the chips from wrong uvp shut- down being caused by noise. the apw7324 will be latched after under-voltage protection. o v e r - v o l t a g e p r o t e c t i o n ( o v p ) t h e o v e r - v o l t a g e f u n c t i o n m o n i t o r s t h e o u t p u t v o l t a g e b y f b p i n . w h e n t h e f b v o l t a g e i n c r e a s e s o v e r 1 2 5 % o f t h e r e f e r e n c e v o l t a g e d u e t o t h e h i g h - s i d e m o s f e t f a i l u r e o r f o r o t h e r r e a s o n s , t h e o v e r - v o l t a g e p r o t e c t i o n c o m p a r a t o r w i l l f o r c e t h e l o w - s i d e m o s f e t g a t e d r i v e r h i g h . t h i s a c - t i o n a c t i v e l y p u l l s d o w n t h e o u t p u t v o l t a g e a n d e v e n t u a l l y a t t e m p t s t o b l o w t h e i n t e r n a l b o n d i n g w i r e s . a s s o o n a s t h e o u t p u t v o l t a g e i s w i t h i n r e g u l a t i o n , t h e o v p c o m p a r a - t o r i s d i s e n g a g e d . t h e c h i p w i l l r e s t o r e i t s n o r m a l o p e r a t i o n . o v e r - t e m p e r a t u r e p r o t e c t i o n ( o t p ) the over-temperature circuit limits the junction tempera- ture of the apw7324. when the junction temperature ex- ceeds t j = 160 o c, a thermal sensor turns off the both power mosfets, allowing the devices to cool. c u r r e n t - l i m i t p r o t e c t i o n t h e a p w 7 3 2 4 m o n i t o r s t h e o u t p u t c u r r e n t , f l o w s t h r o u g h t h e h i g h - s i d e a n d l o w - s i d e p o w e r m o s f e t s , a n d l i m i t s t h e c u r r e n t p e a k a t c u r r e n t - l i m i t l e v e l t o p r e v e n t t h e i c f r o m d a m a g i n g d u r i n g o v e r l o a d , s h o r t - c i r c u i t a n d o v e r - v o l t a g e c o n d i t i o n s . t y p i c a l h i g h s i d e p o w e r m o s f e t c u r - r e n t l i m i t i s 6 a , a n d l o w s i d e m o s f e t c u r r e n t l i m i t i s 1 . 9 a . soft-start t h e a p w 7 3 2 4 h a s a b u i l t - i n s o f t - s t a r t t o c o n t r o l t h e r i s e r a t e o f t h e o u t p u t v o l t a g e a n d l i m i t t h e i n p u t c u r r e n t s u r g e d u r i n g s t a r t - u p . d u r i n g s o f t - s t a r t , a n i n t e r n a l v o l t a g e r a m p c o n n e c t e d t o o n e o f t h e p o s i t i v e i n p u t s o f t h e e r r o r a m p l i f i e r , r i s e s u p f r o m 0 v t o 0 . 9 5 v t o r e p l a c e t h e r e f e r - e n c e v o l t a g e ( 0 . 8 v ) u n t i l t h e v o l t a g e r a m p r e a c h e s t h e r e f e r e n c e v o l t a g e . d u r i n g s o f t - s t a r t w i t h o u t o u t p u t o v e r - v o l t a g e , t h e a p w 7 3 2 4 c o n v e r t e r ? s s i n k i n g c a p a b i l i t y i s d i s - a b l e d u n t i l t h e o u t p u t v o l t a g e r e a c h e s t h e v o l t a g e t a r g e t . s o f t - s t o p a t t h e m o m e n t o f s h u t d o w n c o n t r o l l e d b y e n s i g n a l , u n - d e r - v o l t a g e e v e n t o r o v e r - t e m p e r a t u r e p r o t e c t i o n , t h e a p w 7 3 2 4 i n i t i a t e s a s o f t - s t o p p r o c e s s t o d i s c h a r g e t h e o u t p u t v o l t a g e i n t h e o u t p u t c a p a c i t o r s . c e r t a i n l y , t h e l o a d c u r r e n t a l s o d i s c h a r g e s t h e o u t p u t v o l t a g e . d u r i n g s o f t - s t o p , t h e i n t e r n a l v o l t a g e r a m p ( v r a m p ) f a l l s d o w n f r o m 0 . 9 5 v t o 0 v t o r e p l a c e t h e r e f e r e n c e v o l t a g e . t h e r e f o r e , t h e o u t p u t v o l t a g e f a l l s d o w n s l o w l y a t t h e l i g h t l o a d . a f t e r t h e s o f t - s t o p i n t e r v a l e l a p s e s , t h e s o f t - s t o p p r o c e s s e n d s a n d t h e i c t u r n s o n t h e l o w - s i d e p o w e r m o s f e t . e n a b l e a n d s h u t d o w n driving en to ground places the apw7324 in shutdown. in shutdown mode, the internal power mosfets turns off, all internal circuitry shuts down and the quiescent supply current reduces to less than 20 m a. the thermal sensor allows the converters to start a start- up process and to regulate the output voltage again after the junction temperature cools by 50 o c. the otp is de- signed with a 50 o c hysteresis to lower the average t j during continuous thermal overload conditions, increas- ing lifetime of the apw7324.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 3 f u n c t i o n d e s c r i p t i o n ( c o n t . ) p o w e r g o o d i n d i c a t o r p o k i s a c t i v e l y h e l d l o w i n s h u t d o w n a n d s o f t - s t a r t s t a t u s . i n t h e s o f t - s t a r t p r o c e s s , t h e p o k i s a n o p e n - d r a i n . w h e n t h e s o f t - s t a r t i s f i n i s h e d , t h e p o k i s r e l e a s e d . i n n o r m a l o p e r a t i o n , t h e p o k w i n d o w i s f r o m 8 7 . 5 % t o 1 1 2 . 5 % o f t h e c o n v e r t e r r e f e r e n c e v o l t a g e . w h e n t h e o u t p u t v o l t a g e h a s t o s t a y w i t h i n t h i s w i n d o w , p o k s i g n a l w i l l b e c o m e h i g h a f t e r 0 . 5 m s i n t e r n a l d e l a y . w h e n t h e o u t p u t v o l t a g e o u t r u n s 8 2 . 5 5 % o r 1 1 7 . 5 % o f t h e t a r g e t v o l t a g e , p o k s i g - n a l w i l l b e p u l l e d l o w i m m e d i a t e l y . i n o r d e r t o p r e v e n t f a l s e p o k d r o p , c a p a c i t o r s n e e d t o p a r a l l e l a t t h e o u t p u t t o c o n f i n e t h e v o l t a g e d e v i a t i o n w i t h s e v e r e l o a d s t e p t r a n s i e n t .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 4 a p p l i c a t i o n i n f o r m a t i o n input capacitor selection because buck converters have a pulsating input current, a low esr input capacitor is required. this results in the best input voltage filtering, minimizing the interference with other circuits caused by high input voltage spikes. also, the input capacitor must be sufficiently large to sta- bilize the input voltage during heavy load transients. for good input voltage filtering, usually a 22 m f input capaci- tor is sufficient. it can be increased without any limit for better input voltage filtering. ceramic capacitors show better performance because of the low esr value, and they are less sensitive against voltage transients and spikes compared to tantalum capacitors. place the input capacitor as close as possible to the input and gnd pin of the device for better performance. inductor selection for high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. especially at high-switching frequencies the core material has a higher impact on efficiency. when using small chip inductors, the efficiency is reduced mainly due to higher inductor core losses. this needs to be considered when select- ing the appropriate inductor. the inductor value deter- mines the inductor ripple current. the larger the inductor value, the smaller the inductor ripple current and the lower the conduction losses of the converter. conversely, larger inductor values cause a slower load transient response. a reasonable starting point for setting ripple current, d i l, is 40% of maximum output current. the recommended inductor value can be calculated as below: l sw in out out i f v v 1 v l d ? ? ? ? ? - 3 i l(max) = i out(max) + 1/2 x d i l to avoid saturation of the inductor, the inductor should be rated at least for the maximum output current of the con- verter plus the inductor ripple current. output voltage setting in the adjustable version, the output voltage is set by a resistive divider. the external resistive divider is con- nected to the output, allowing remote voltage sensing as shown in ?typical application circuits?. a suggestion of maximum value of r2 is 300k w to keep the minimum current that provides enough noise rejection ability through the resistor divider. the output voltage can be calculated as below: ? ? ? ? ? + = 2 r 1 r 1 v v ref out output capacitor selection the current-mode control scheme of the apw7324 al- lows the use of tiny ceramic capacitors. the higher ca- pacitor value provides the good load transients response. ceramic capacitors with low esr values have the lowest output voltage ripple and are recommended. if required, tantalum capacitors may be used as well. the output ripple is the sum of the voltages across the esr and the ideal output capacitor. ? ? ? ? ? + ? ? ? ? ? - @ d out sw sw in out out out c f 8 1 esr l f v v 1 v v when choosing the input and output ceramic capacitors, choose the x5r or x7r dielectric formulations. these dielectrics have the best temperature and voltage char- acteristics of all the ceramics for a given value and size. v in v ou t i l n-fet lx i ou t c in c ou t i in esr p-fet i p-fet r 2 300 k w apw 7324 fb gnd v out r 1 1 m w
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 5 a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) output capacitor selection (cont.) i lim i l i peak i out i p-fet d i l layout considerations for all switching power supplies, the layout is an impor- tant step in the design; especially at high peak currents and switching frequencies. if the layout is not carefully done, the regulator might show noise problems and duty cycle jitter. 1. the input capacitor should be placed close to the vin and gnd. connect the capacitor and vin/gnd with short and wide trace without any via holes for good input volt- age filtering. the distance between vin/gnd to capacitor less than 2mm respectively is recommended. 2. to minimize copper trace connections that can inject noise into the system, the inductor should be placed as close as possible to the lx pin to minimize the noise coupling into other circuits. 3. the output capacitor should be place closed to vout and gnd. 4. keep the sensitive small signal nodes (fb) away from switching nodes (lx) on the pcb. therefore place the feedback divider and the feedback compensation net- work close to the ic to avoid switching noise. connect the ground of feedback divider directly to the gnd pin of the ic using a dedicated ground trace. 5. a star ground connection or ground plane minimizes ground shifts and noise is recommended. recommended minimum footprint 0 . 2 1 2 0 . 0 7 2 0 . 050 0 . 024 1 2 3 4 8 7 6 5 0 . 1 1 8 0 . 138 unit : inch sop - 8 p 0 . 3 0 mm 1 . 75 mm ground plane for thermalpad thermalvia diameter 12 mil x 5 0 . 27 5 mm 0 . 75 mm 0 . 50 mm tdfn 3 x 3 - 10 2 . 7 0 m m
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 6 p a c k a g e i n f o r m a t i o n s o p - 8 p thermal pad d d1 e 2 e 1 e e b h x 4 5 o c see view a a 2 a a 1 view a l 0 . 2 5 gauge plane seating plane q note : 1. followed from jedec ms-012 ba. 2. dimension "d" does not include mold flash, protrusions or gate burrs. mold flash, protrusion or gate burrs shall not exceed 6 mil per side . 3. dimension "e" does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 10 mil per side. 0.020 0.010 0.020 0.050 0.006 0.063 max. 0.40 l 0 0 o c e e h e1 0.25 d c b 0.17 0.31 0.016 1.27 8 o c 0 o c 8 o c 0.50 1.27 bsc 0.51 0.25 0.050 bsc 0.010 0.012 0.007 millimeters min. s y m b o l a1 a2 a 0.00 1.25 sop-8p max. 0.15 1.60 min. 0.000 0.049 inches d1 2.50 0.098 2.00 0.079 e2 3.50 3.00 0.138 0.118 4.80 5.00 0.189 0.197 3.80 4.00 0.150 0.157 5.80 6.20 0.228 0.244
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 7 t d f n 3 x 3 - 1 0 0.70 0.069 0.028 0.002 0.50 bsc 0.020 bsc 0.20 0.008 k 2.90 3.10 0.114 0.122 2.90 3.10 0.114 0.122 s y m b o l min. max. 0.80 0.00 0.18 0.30 2.20 2.70 0.05 1.40 a a1 b d d2 e e2 e l millimeters a3 0.20 ref tdfn3x3-10 0.30 0.50 1.75 0.008 ref min. max. inches 0.031 0.000 0.007 0.012 0.087 0.106 0.055 0.012 0.020 note : 1. followed from jedec mo-229 veed-5. pin 1 corner e l k e 2 d2 a1 a3 b a e pin 1 d p a c k a g e i n f o r m a t i o n
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 8 c a r r i e r t a p e & r e e l d i m e n s i o n s a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1 h t1 a d package type unit quantity sop - 8p tape & reel 2500 tdfn - 3x3 - 10 tape & reel 3000 d e v i c e s p e r u n i t application a h t1 c d d w e1 f 330.0 ? 2.00 50 min. 12.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 12.0 ? 0.30 1.75 ? 0.10 5.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 sop - 8p 4.0 ? 0.10 8.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0.4 0 6.40 ? 0.20 5.20 ? 0.20 2.10 ? 0.20 application a h t1 c d d w e1 f 330.0 ? 2.00 50 min. 12.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 12.0 ? 0.30 1.75 ? 0.10 5.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tdfn3x3 - 10 4.0 ? 0.10 8.0 ? 0.10 2.0 ? 0.05 1.5+0.1 0 - 0.00 1.5 min. 0.6+0.00 - 0.40 3.30 ? 0.20 3.30 ? 0.20 1.30 ? 0.20 (mm)
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 1 9 t a p i n g d i r e c t i o n i n f o r m a t i o n s o p - 8 p user direction of feed t d f n 3 x 3 - 1 0 user direction of feed
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 2 0 c l a s s i f i c a t i o n p r o f i l e
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 2 1 c l a s s i f i c a t i o n r e f l o w p r o f i l e s profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spec ified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined a s a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ tj=125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a1 15 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma r e l i a b i l i t y t e s t p r o g r a m
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 4 - a u g . , 2 0 1 3 a p w 7 3 2 4 w w w . a n p e c . c o m . t w 2 2 c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8

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